In the semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
Semiconductor device fabrication includes many different processes. Many processes are plasma related processes. Such plasma-related processes include plasma etching, plasma ashing, Chemical Vapor Deposition (CVD), and Physical Vapor Deposition (PVD). Such processes typically involve use of a plasma gas that is used to either carry a material to be deposited onto a substrate or to react with a material to be removed from the substrate. The plasma gas is directed to the substrate using an electromagnetic field.
Some plasma-related fabrication processes may produce undesired results on the wafer. For example, due to various factors, a plasma etching process may etch more material in the center of the wafer than at the edges of the wafer, resulting in a slight dishing effect. Additionally, some plasma deposition processes may result in additional material being deposited toward the center of the wafer, resulting in a bulging effect. It is desirable to produce fabrication processes that address such phenomena.